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april 2008 rev 3 1/29 AN2566 application note pm6680 evaluation kit du al step-down controller with auxiliary voltages for notebook power system introduction pm6680a evaluation kit orde r code: steval-isa053v1. the pm6680 is a dual step-down controller with adjustable output voltages for notebook computer power systems. the pm6680 evaluation kit is designed to test the performance of the pm6680 by employing a typical application circuit that allows testing of all pm6680 device functions. the kit features two switch ing sections, with (typically) 1.5 v and 1.05 v outputs, from a 6 v to 28 v input battery voltage. the operating switching frequency of the two switching sections is 200 khz / 300 khz, respectively. each switching section delivers more than 5 a output current. moreover, an internal linear regulator can provide 5 v @ 100 ma peak current. figure 1. pm6680 evaluation kit to p bottom www.st.com
contents AN2566 2/29 contents 1 main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 evaluation kit schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 component list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 evaluation board layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 i/o interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6 recommended equipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7 quick start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 8 jumper settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 9 feedback output connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 10 test setup and performance summ ary . . . . . . . . . . . . . . . . . . . . . . . . . 17 10.1 test setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 10.2 power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 10.3 soft-start and shutdown waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 10.4 1.5 v and 1.05 v output efficiency vs. load current . . . . . . . . . . . . . . . . . 19 10.5 power consumption analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 10.6 switching frequency vs. load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 10.7 linear regulator output voltages vs. output current . . . . . . . . . . . . . . . . . 24 10.8 load transient responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 11 representatives waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 12 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
AN2566 list of figures 3/29 list of figures figure 1. pm6680 evaluation kit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 figure 2. evaluation kit schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. pm6680 evaluation board layout - top layer (pgnd plain and component side) . . . . . . . . . 9 figure 4. pm6680 evaluation board layout - inner layer 1 (sgnd layer and v in plane) . . . . . . . . . . . 9 figure 5. pm6680 evaluation board layout - inner layer 2 (sgnd layer and signals) . . . . . . . . . . . . 10 figure 6. pm6680 evaluation board layout - bottom layer (pm6680 and component side) . . . . . . . . 10 figure 7. ref and ldo5 power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 8. section 1 soft-start waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 9. section 2 soft-start waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 10. section 1 shutdown waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 11. section 2 shutdown waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 12. 1.5 v smps efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 13. 1.05 v smps efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 14. input current vs. input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 15. input current vs. input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 16. input current vs. input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 17. device current consumption vs. input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 18. device current consumption vs. input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 19. 1.5 v output switching frequency vs. load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 20. 1.05 v output switching frequency vs. load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 21. ldo5 output vs. load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 22. smps 1.5 v load transient response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 23. smps 1.05 v load transient response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 figure 24. smps pulse skip mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 25. smps no-audible skip mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 26. smps pwm mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
list of tables AN2566 4/29 list of tables table 1. component list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 2. the test points of the evaluation board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 3. jumper s11 - v5sw pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 4. jumper s3 - fsel pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 5. jumper s10 - skip pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 6. jumper s4, s5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 7. jumper s8, s9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 8. jumper s4, s5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 9. jumper s8, s9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 10. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
AN2566 main features 5/29 1 main features constant on-time cont rol allows very fast load transients 6 v to 28 v input voltage range 5 v auxiliary output voltage adjustable switching outputs lossless current sensing using low side mosfet r ds(on) negative current limit soft-start internally fixed at 2.8 ms soft-end for output discharge 200 khz / 300 khz, 300 khz / 400 khz, 400 khz / 500 khz (5 v / 3 v selectable switching frequency) selectable pulse skip and no-audible skip modes at light loads independent power good signals
evaluation kit schematic AN2566 6/29 2 evaluation kit schematic figure 2. evaluation kit schematic
AN2566 component list 7/29 3 component list table 1. component list name description size value supplier part number c1, c2, c3 ceramic capacitor 50 v 1210 10 f taiyo yuden umk325bj106km c4 ceramic capacitor 50 v 1210 not installed c5, c6 ceramic capacitor 0805 0,1 f standard c7 low esr capacitor d case not installed standard c8 low esr capacitor 4 v, 12 m ? esr d case 330 f poscap - sanyo 4tpd33om c11 low esr capacitor d case not installed standard c12 low esr capacitor 4 v, 12 m ? esr d case 330 f poscap - sanyo 4tpd33om c13, c14 ceramic capacitor 0805 5.6 nf standard c15, c16 ceramic capacitor 0603 1 nf standard c17, c18 ceramic capacitor 0603 47 pf standard c19 ceramic capacitor 50 v 0805 0.1 f standard b37941k5104k62 c26 tantalum capacitor 35 v c case 4.7 f avx tps tpsc475*035#0600 c20 ceramic capacitor 0603 1 f standard c21 tantalum capacitor package a, 16 v b case 4.7 f avx thj thjb475*016#jn c22 ceramic capacitor 0805 220 nf standard c9, c10 ceramic capacitor 0805 not installed standard c23 ceramic capacitor 0603 10 pf standard cin electrolytic capacitor 39 f, 25 v d 10 mm not installed sanyo 25svpd39m cref ceramic capacitor 0603 100 nf standard c24,c25 ceramic capacitor 0805 10 f standard c27 ceramic capacitor 0805 not installed standard c28 tantalum capacitor 3216 not installed standard d1 dual schottky diode sot23 stmicroelectronics bat54a d2,d3 diode 1 a, 30 v do216-a a stmicroelectronics stps1l30m ic1 pm6680 device vfqfpn-32 5 mm x 5 mm stmicroelectronics pm6680
component list AN2566 8/29 l1 1.5 h inductor, 12 a sat. 13 mm x 13 mm 1.5 h coilcraft mlc1538-152ml l2 2.5 h inductor, 8 a sat. 13 mm x 13 mm 2.5 h coilcraft mlc1550-252ml m1 mosfet control fet so-8 so-8 stmicroelectronics sts12nh3ll m2 mosfet control fet so-8 so-8 stmicroelectronics sts12nh3ll m3 mosfet sync fet so-8 so-8 stmicroelectronics sts12nh3ll m4 mosfet sync fet so-8 so-8 stmicroelectronics sts12nh3ll r7,r8 resistor 0805 680 ? standard r3 resistor 0805 22 k ? standard r4 resistor 0805 36 k ? standard r5 resistor 0805 3.3 k ? standard r6 resistor 0805 3 k ? standard r24 resistor 0805 1.1 k ? standard r25 resistor 0805 820 ? standard r9 resistor 0805 47 ? standard r10,r11 resistor 0805 10 ? standard r12,r13, r14,r15 resistor 0603 100 k ? standard r16 resistor 0603 150 k ? standard r18,r19 resistor 0603 not installed r17 resistor 0603 560 k ? standard r26 resistor 1206 3.9 ? standard r20, r21, r22, r23 resistor 0805 0 ? standard r27 resistor 0805 10 k ? standard r28 resistor 0805 6.8 k ? standard r29 resistor 0805 11 k ? standard r30 resistor 0805 1.8 k ? standard r31 resistor 0805 not installed standard r32 resistor 0805 not installed standard rld5v, rld3v resistor 0805 not installed standard table 1. component list (continued) name description size value supplier part number
AN2566 evaluation board layout 9/29 4 evaluation board layout figure 3. pm6680 evaluation board layout - top layer (pgnd plain and component side) figure 4. pm6680 evaluation board layout - inner layer 1 (sgnd layer and v in plane)
evaluation board layout AN2566 10/29 figure 5. pm6680 evaluation board layout - inner layer 2 (sgnd layer and signals) figure 6. pm6680 evaluation board layout - bottom layer (pm6680 and component side)
AN2566 i/o interface 11/29 5 i/o interface the evaluation board has the following test points. table 2. the test points of the evaluation board test point description v in + input voltage v in - input voltage ground ldo5 5 v linear regulator output ldo_adj not used for this device ext5v 5 v external input out1+ out1 switching section output out1- out1 switching section output ground pgood1 out1 switching section power good out2+ out2 switching section output out2+ out2 switching section output ground pgood2 out2 switching section power good j10 junction pin between pgnd and sgnd planes
recommended equipment AN2566 12/29 6 recommended equipment 6 v to 28 v power supply, notebook computer battery or ac adapter active loads digital multimeter 500 mhz four-trace oscilloscope
AN2566 quick start 13/29 7 quick start 1. connect the v in + and v in - test points of the evaluation board to an external power supply. 2. ensure that all dip switches (s2) are in the "off" position. in this condition all outputs are disabled (shutdown mode). 3. turn s2 1 to the ?on? position (shdn pin high). this turns on the ldo5 output (standby-mode). 4. turn s2 2 to the ?on? position (en1 pin high). the 1.5 v switching controller begins regulation of the output. pgood1 pin goes high after soft-start. 5. turn s2 3 to the ?on? position (en2 pin high). the 1.05 v switching controller begins regulation of the output. pgood2 pin goes high after soft-start. 6. in order to load the switching outputs, the loads must be connected between the "+" and the "-" output test points, respectively. 7. in order to load the linear outputs, the loads must be connected between j10 and ldo5 or alternative rld5v resistors can be used on the evaluation board.
jumper settings AN2566 14/29 8 jumper settings it is possible to select different working conditions by using the jumpers on the board. note: jumpers s1,s6, s7, s12 and s13 are already soldered on the evaluation board and it is not necessary to change them. please refer to the schematic to verify their proper connection. the external bypass connections for the linear regulator ldo5 are set by connecting the v5sw pin to jumper s11 as indicated in ta b l e 3 below. the fsel pin is connected to jumper s3 to select the smps frequency. the jumper positions and corresponding frequencies are shown in ta b l e 4 below. table 3. jumper s11 - v5sw pin connections position ldo5 working conditions out5v when the main output voltage is greater than the boostrap-switchover threshold, an internal 3 ? (max) p-channel mosfet switch connects the v5sw pin to the ldo5 pin shutting down the ldo5 internal linear regulator. if not used, it must be tied to ground. sgnd the internal linear regulator ldo5 is always on. in this case ldo5 supplies all gate drivers and the internal circuitry. it can provide an output peak current of 100 ma. ext5v the internal linear regulator ldo5 remains off if an alternative 5v external voltage is applied to the ext5v test-point. an internal 3 ? (max) p- channel mosfet switch connects v5 sw pin to ldo5 output. the gate drivers and internal circuitry are supplied by the same 5 v external voltage applied. table 4. jumper s3 - fsel pin connections position smps out1 smps out2 sgnd 200 khz 300 khz vref 300 khz 400 khz ldo5 400 khz 500 khz
AN2566 jumper settings 15/29 to select the switching operation mode of the smps, connect the skip pin to jumper s10 as described in table 5. table 5. jumper s10 - skip pin connections position switching operating mode gnd if the skip pin is tied to ground, a pulse skip mode takes place at light loads. a zero crossing comparator pr events the inductor current from going negative. vref if the skip pin is tied to vref pin enables a pulse skip mode with a minimum switching frequency about 25 khz (ultrasonic mode). ldo5 if the skip pin is tied to 5 v, the fixed pwm mode takes place. the switching output is in a position to si nk and source current from the load.
feedback output connections AN2566 16/29 9 feedback output connections ta bl e 6 and ta bl e 7 below illustrate jumper settings fo r a loop compensation network for very low output voltage ripple. ta bl e 8 and ta bl e 9 describe the settings for a loop compensation network for high output voltage ripple. table 6. jumper s4, s5 position output ripple compensation short virtual esr output ripple is generated by using a compensation network connected between the output and phase pi n of the switching section. table 7. jumper s8, s9 position feedback connection controller feedback signal connected to the compensation network table 8. jumper s4, s5 position output ripple compensation open esr output ripple is used. table 9. jumper s8, s9 position feedback connection controller feedback signal connected directly to the output capacitor.
AN2566 test setup and performance summary 17/29 10 test setup and performance summary 10.1 test setup the pm6680 evaluation board has the following input/output connections: ? 12 v input through j5-j2 (v in + and v in -) ? 1.5 v smps output through j4-j13 (out1+ and out1-) ? 1.05 v smps output through j1-j12 (out2+ and out2-) ? 5 v linear regulator output through j3 (ldo5) a power supply capable of supplying at least 6 a should be connected to v in +, v in - and two active loads should be connected respecti vely to out1+, out1- and out2+, out2-. 10.2 power-up as shown in figure 7 , the power-up starts when the input voltage is applied and the voltage on the shdn pin is above the device ?on? threshold. first, the ldo5 goes up with a masking time of about 4 ms. figure 7. ref and ldo5 power-up 10.3 soft-start and shutdown waveforms figure 8 and 9 show the soft-start waveforms. figure 10 and 11 show the shut down waveforms. the pm6680 has an independent internal digital soft-start for each switching section. during the soft-start phase the internal current limit increases from 25% to 100%, in increments of 25%, to avoid the inductor current reaching too high a value. ldo5 vref shdn
test setup and performance summary AN2566 18/29 figure 8. section 1 soft-start waveforms figure 9. section 2 soft-start waveforms driving the shdn pin below the shdn device ?o ff? threshold will cause the device to enter shutdown mode. in this case the switching outputs are connected to ground through an internal 12 ? power mosfet and are discharged softly, (discharge mode). when the output voltages reach 0.3 v, the low side mosfets are turned on, quickly discharging them to ground. out1 i_l en1 out2 en2 i_l
AN2566 test setup and performance summary 19/29 figure 10. section 1 shutdown waveforms figure 11. section 2 shutdown waveforms 10.4 1.5 v and 1.05 v output efficiency vs. load current figure 12 and figure 13 show the efficiency versus load current for different input voltage values in pwm mode, skip mode and no-audible skip mode. out1 lgate1 en1 out2 lgate2 en2 en2
test setup and performance summary AN2566 20/29 figure 12. 1.5 v smps efficiency figure 13. 1.05 v smps efficiency 10.5 power consumption analysis to measure the device consumption under real working conditions, an external power supply of +5 v is connected to ext5v. the two traces on figures that follow show the differentiation between the two input currents. once the internal linear regulator is turn ed on, device consumption will increase as a consequence. figure 14 shows the input current consumption measured at v in + (includes ishdn) and the input device current consumption measured at the vcc pin. both switching sections are working in forced pwm mode. no load is applied on the outputs. 1.5v output efficiency vs load current 0 10 20 30 40 50 60 70 80 90 100 0.01 0.1 1 10 load current [a] efficiency [ % a: s kip, vin=10. 8 v b: s kip, vin=14.4v c: pwm, vin=10. 8 v d: pwm, vin=14.4v e: no aud., vin=10. 8 v f: no aud vin=14 4v a b c d e f 1.05v output efficiency vs load current 0 10 20 30 40 50 60 70 80 90 100 0.01 0.1 1 10 load current [a] efficiency [ % a: s kip, vin=10. 8 v b: s kip, vin=14.4v c: pwm, vin=10. 8 v d: pwm, vin=14.4v e: no aud., vin=10. 8 v f : no aud vin=14 4v a b c d e f
AN2566 test setup and performance summary 21/29 figure 14. input current vs. input voltage figure 15 shows the input current consumption measured at v in + (includes ishdn) and the input device current consumption measured at the vcc pin(iext5v). both switching sections are working in skip mode. no load is applied. figure 15. input current vs. input voltage
test setup and performance summary AN2566 22/29 figure 16 shows the input current consumption measured at v in + (includes ishdn) and the input device current consumption measured at the vcc pin(iext5v). both switching sections are working in no-audible skip mode. no load is applied. figure 16. input current vs. input voltage in the following illustrations, the device current consumption is measured in shutdown mode and standby mode. in shutdown mode all outputs are off (shdn pin low). in standby mode only the linear regulator output is on (v5sw = sgnd, shdn pin high, en5 and en3 pins low). figure 17. device current consumption vs. input voltage shutdown mode input battery current vs input voltage 0.00 5.00 10.00 15.00 20.00 25.00 8 10121416182022242628 input voltage [v] input current [ua]
AN2566 test setup and performance summary 23/29 figure 18. device current consumption vs. input voltage 10.6 switching freque ncy vs. load current figure 19 and figure 20 show the switching frequency variation with the load current in pwm mode, skip mode and no-audible skip mode. 12 v is applied at the v in + and v in - test points. figure 19. 1.5 v output switching frequency vs. load current standby mode input battery current vs input voltage 172 174 176 178 180 182 184 8 10121416182022242628 input voltage [v] input current [ua] 1.5v switching frequency vs load current 0 50 100 150 200 250 0.01 0.1 1 10 load current [a] frequency [khz] pwm no aud. s kip s kip
test setup and performance summary AN2566 24/29 figure 20. 1.05 v output switching frequency vs. load current 10.7 linear regulator output voltages vs. output current figure 21 shows the load regulation for the internal linear regulator ldo5. both switching sections are disabled and 12 v is applied at v in + and v in - test points. figure 21. ldo5 output vs. load current 10.8 load transient responses the following figures show the load transient response from 1 a to 4 a for both switching outputs. in each of these cases the pm6680 works in forced pwm mode (the skip pin is high). 1.05v switching frequency vs load current 0 50 100 150 200 250 300 350 0.01 0.1 1 10 load current [a] frequency [khz] pwm no aud. s kip s kip ldo5 vs. output current 4.9790 4.9800 4.9810 4.9820 4.9830 4.9840 4.9850 4.9860 4.9870 4.9880 4.9890 0 102030405060708090100 load current [ma] linear ouput voltage [v ]
AN2566 test setup and performance summary 25/29 figure 22. smps 1.5 v load transient response figure 23. smps 1.05 v load transient response vphase out1 i_l out2 vphase i_l
representatives waveforms AN2566 26/29 11 representatives waveforms the following illustrations show the relevant waveforms of a switching section and are provided to underline the behavior of the device in pulse skip mode, no-audible skip mode and forced pwm mode working conditions. figure 24. smps pulse skip mode figure 25. smps no-audible skip mode
AN2566 representatives waveforms 27/29 figure 26. smps pwm mode
revision history AN2566 28/29 12 revision history table 10. document revision history date revision changes 20-aug-2007 1 initial release 05-mar-2008 2 ? changed: figure 1 , 2 , 3 , 14 , and 16 ? modified: ta bl e 1 ? minor text changes 07-apr-2008 3 ? modified : introduction
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